The use of thin-film photovoltaic (PV) devices based on amorphous Si (a-Si), cadmium telluride (CdTe), or copper indium gallium selenide (CuInxGa1−xSe2 or CIGS) is becoming more widespread due to continued enhancements in cell efficiency, which are coupled with decreasing costs. However, as in crystalline-silicon PV devices, charge-carrier recombination at interfaces within the cell or at exposed surfaces of the cell can reduce cell efficiency via charge carrier losses. Reducing charge-carrier recombination, therefore, can beneficially increase the open circuit voltage, short circuit current, and efficiency of thin-film PV devices. While carrier recombination may be reduced at exposed surfaces of PV devices through the use of passivating insulating layers (e.g., thermally grown silicon dioxide layers on Si PV devices), such insulating layers block current flow and thus may not be utilized within the PV cell itself, or carrier transport within the PV cell will be disrupted or blocked. Thus, there is a need for carrier-recombination techniques usable within the cell structures of PV devices (e.g., at interfaces within the cell) that do not deleteriously impact device efficiency.